   The Missing Link 
   DATE: September 20th 1990
   JOB:  TML Command hardware addresses
   SOFTWARE PARAMETERS: Econet Base Address (BA)] = &33A0000 

       COMMAND TABLE
       =============
   command number
   1     Base Address +0  (&33A0000)
            READING  =  Read Input Data Register (IDR)
            WRITING  =  RESET the link chip
   2     Base Address +4  (&33A0004)
            READING  =  Invalid command
            WRITING  =  Write Output Data Register (ODR)
   3     Base Address +8  (&33A0008)
            READING  =  Read Input Status Register(ISR)
            WRITING  =  Write (ISR)
   4     Base Address +12 (&33A000C)
            READING  =  Read Output Status Register(OSR)
            WRITING  =  Write (OSR)
   Command Notes:
   --------------
   1    Reading this location will provide a Byte of valid data if the
        'DATA PRESENT' bit has been set in the ISR and the data has not been
        read previously.Reading this location twice will result in invalid
        data being read the second time round. Writing to this location will
        preform a hardware reset on the link adaptor and the outputs and
        registers will all be set to zero.Warning, doing a reset will destroy
        the data packets in the input que and in the output buffer. It is up
        to the application to inform the other end about the reset condition
        which it has just preformed. (But it is much better not to reset the
        link chip unless it is preformed manually before transmission is
        started) Resetting the module MUST happen initially and before any
        transmission/reception can be guarenteed.
   2    Reading this location is not advisable, spurious results will
        occurr!! Writing to this location should only be allowed if the
        'OUTPUT READY' bit in the OSR is set. Writing to this location at
        other times will cause spurious results.
   3    Reading this location will return a byte, if bit 0 ('DATA
        PRESENT') is a one then there is data waiting to be read from the IDR
        If bit 1 is a one then the interrupt flag is set and an external
        interrupt is caused if both these flags are one(bit 0 and bit 1).
        (NOTE: this is not implemented on the 10Mb/s Missing link
        board).Writing to this location can only be used to change the state
        of bit 1, all other bits MUST be zeros.
   4    Reading this location will return a byte, if bit 0 ('OUTPUT
        READY') is a one then the link is free to have data written to the
        ODR.If bit 1 is a one then the interrupt flag is set and an external
        interrupt is caused if both these flags are one(bit 0 and bit 1).
        (NOTE: this is not implemented on the 10Mb/s Missing link
        board).Writing to this location can only be used to change the state
        of bit 1, all other bits MUST be zeros.

          R     W    ADDRESS
       -----------------------              IDR = Input Data Register
       | IDR | RST | &33A0000 |             RST = reset link chip
       | ODR | INV | &33A0004 |             ODR = Output Data Register
       | ISR | ISR | &33A0008 |             INV = Invalid address
       | OSR | OSR | &33A000C |             ISR = Input Status Register
       -----------------------              OSR = Output Status Register

