RISC OS Open
A fast and easily customised operating system for ARM devices
ROOL
Home | News | Software | Bugs | Bounties | Forum | Documents | Photos | Contact us
Account

OS_MMUControl

Programmer's Reference Manuals
» Part 15 – SWI Calls
» OS
» OS_MMUControl

OS_MMUControl

(SWI &6B)
Entry
R0 Reason code (bits 0 -7),
Flags (bits 8 – 31) which are reason code specific
All other registers are dependent on reason code
Exit
All other registers dependent on reason code

Use

The purpose of this call is to modify the ARM MMU control register.

Notes

The action performed depends on the reason code value in R0.

The flags (passed by R0 on entry) are specific to each reason code.

Reason Codes

# Hex # Action
1 &01 Cache flush request
Revised on November 26, 2010 12:51:56 by Trevor Johnson (329)? (127.0.0.1)
Edit | Back in time (1 revision) | See changes | History | Views: Print | Source | Linked from: OS SWI Calls, OS_MMUControl 1, OS_MMUControl 1 Flags

Search the Wiki

Commercial use

For commercial enquiries, please contact the owners of RISC OS, Castle Technology Ltd.

ROOL Store

The official C/C++ Development kit and more here.

Donate! Why?

Help ROOL make things happen – please consider donating!

Navigation

  • Home Page
  • All Pages
  • Recently Revised
  • Authors
  • Feeds
Site design © RISC OS Open Limited 2011 except where indicated
The RISC OS Open Instiki theme is based on Insitki's default layout

Valid XHTML 1.0  |  Valid CSS

Instiki 0.19.1(MML+)
This site runs on Rails

Hosted by Arachsys