ARMv7 inline assembler in C compiler
Currently, it is difficult to take full advantage of the modern features of ARM processors from C code. Most of the applications used on RISC OS are themselves written in C. Adding this feature will make it easier to address this issue.
The C compiler currently implements inline assembler. This is limited to the ARMv5 support at the moment. It compiles C code and inline assembler to an intermediate instruction set (“jopcodes”), and the ARM backend can generate ARMv5 and a few ARMv6 instructions from these jopcodes. Therefore, to extend the inline assembler, it is necessary as a minimum to also extend the jopcode instruction set.
To deliver a useful performance benefit to most programs, however, the C compiler should also be taught to generate the new jopcodes from C code, and to perform peephole optimisations on the new jopcodes. However, it is accepted that many of the new ARMv6 and v7 instructions cannot naturally be generated from C code, for example because they make use of processor flags.
Source code to the compiler is closed source so any development of this will need to be performed under a non-disclosure agreement between ROOL and the developer (we can supply this).
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