iMX8M
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Michael Grunditz (8594) 260 posts |
I have done a quick bringup on iMX8M… a couple of days work.. time record for me I think! :) RISC OS run natively , but I plan to do RISC OS/Genode hybrid some day. Bench mark .. CPU is running in 1Ghz Test Benchmark Numbers are expected ,but draw file render is quite fast! |
Stuart Swales (1481) 351 posts |
Nice. Shows that we haven’t hit peak AArch32 yet! |
Steffen Huber (91) 1958 posts |
Nice to see that porting RISC OS is getting easier over time :-)
Unfortunately, the iMX8M did away with the most important feature of the iMX6 and the main reason to make an ARMX6 such a nice, balanced machine: S-ATA. As it stands, boards with the iMX8M are both slower and more expensive than the RPi 4. It performs more like a RPi 3. The iMX8 (without the M!) still has S-ATA, but I am not aware of a dev board that is available. |
Steve Pampling (1551) 8188 posts |
A bit more practice and you should be down counting in hours :)
Now that’s one we’d all like to hear more news on(a genode based RO install), but I would prefer you spend the time working on it rather than telling us. |
Michael Grunditz (8594) 260 posts |
Yes sorry. The native port is a big step in the right direction, since Genode can run on the same hardware (or at least hacked in). The iMX8M has a nice feature , MU (message unit) for inter cpu communication. It has dedicated registers and also possibility for shared ram. So the first thing I will do is to test that with 32bit binaries on a dedicated core. If I can make that work, launch RISC OS and setup a module that redirect swis to MU. If that works, starting to implement genode code as replacement for some swis. I know I talk a lot, but things needs to settle in my mind , and talking helps quite often. |
Stuart Swales (1481) 351 posts |
Explaining things to others is often the best way to get things clear in one’s own head! |
Colin Ferris (399) 1819 posts |
Feel free to explain your idea’s Even if they perhaps fly over some of our heads :-) |
Steve Pampling (1551) 8188 posts |
I beg to differ, I suspect I could do a good job of putting you back in 3rd place (or lower).
Talk (write) away, there may be some small understanding out here that may help, and even if that doesn’t happen then you at least have organised your thoughts while explaining. |
David Feugey (2125) 2709 posts |
Does it work on this? (nota: no SATA, but eMMC) |
David J. Ruck (33) 1639 posts |
That is an updated version of the iMx6 based Mimi.m which is nice for RISC OS, but it’s main advantage is the eSATA which is about 3x the speed of a USB attached drive on a Pi4. With both on USB it would be interesting to compare performance, the iMx8 is 1.8GHz out of the box, but the Pi4 can be easily over clock to 2.1GHz. |
Michael Grunditz (8594) 260 posts |
Who needs SATA in the age of nvme? Nvme is one of the things I like to do. |
Chris Gransden (337) 1208 posts |
1.5GHz if it’s this. Overclock ability for Rpi4 depends on board revision. rev 1.1 runs stable at 2.147GHz with active cooling Rpi 400 uses newer CPU stepping so runs stable at 2.4GHz with passive cooling. If/when the CM4 gets ability to boot direct from Nvme may make it easier to port to RISC OS. |
David J. Ruck (33) 1639 posts |
Might struggle fitting a mvme in a cubox/mini.m form factor though, plus it runs hot enough with external storage. |
Michael Grunditz (8594) 260 posts |
Started on the hybrid system.. |
Steve Pampling (1551) 8188 posts |
:) |
David J. Ruck (33) 1639 posts |
Just looked at my RISC OS Marks for the Mini.m which is an iMx6 at 1GHz, and the looped instructions are the same – I’d expect the iMx8 to be at least 50% more. The memory is about twice as fast, which good. Rectangle copy is the same as the mini.m without R-Comps video acceleration, which isn’t great. |
Michael Grunditz (8594) 260 posts |
ehm … I can start RISC OS from Genode , but no use yet. Next step is inter-core communication. |
Michael Grunditz (8594) 260 posts |
So Message Unit is ON. I can send messages between the cores. Very fun! |
Steve Pampling (1551) 8188 posts |
You’ll be running multiple OS instances (one per core) and passing tasks round them in no time at all. |
George T. Greenfield (154) 749 posts |
Absolutely. Could we be about to witness the first ever instance of multicore RISC OS? |
Michael Grunditz (8594) 260 posts |
Not really. But there will be multicore SWI’s, but that isn’t the same as SMP in RISC OS. I think Jeffery is doing a great job in that area. |
Michael Grunditz (8594) 260 posts |
for those who can view twitter: https://twitter.com/QtARM/status/1366512533855739905 and for those who can’t: RISC OS (core 1) running debug output with Message Unit to Genode running on core 0 |
Steve Pampling (1551) 8188 posts |
If one of the cores is running a network capable OS and you send the message to that core (and OS) can you relay it to a network hosted SysLog server? |
Michael Grunditz (8594) 260 posts |
Yes should work. I cannot see any issue except for speed… |
Michael Grunditz (8594) 260 posts |
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