Initial bringup -- Exception vector
Michael Grunditz (8594) 245 posts |
I am trying to debug why why I never gets to the kernel vectors. Before I raise a ticket, where is the vector located, is it at ZeroPage &ffff0000 or is it some offset from that? I am pretty sure that I have been able to set VBAR before in my tests but I will go back to it if I can’t get it to work in kernel. |
Michael Grunditz (8594) 245 posts |
Setting vbar doesn’t have any effect , but I have made a workaround that seems to work. I trap the SWI and constructs the pc adjustment myself. Thanks for reading my “rants” ! |
Michael Grunditz (8594) 245 posts |
RISC OS 511MB Supervisor * |
Michael Grunditz (8594) 245 posts |
RISC OS 511MB Supervisor modules N%.%P%s%t%o% o%k%p%c %a%e Hmm MessageTrans not working? |
Colin Ferris (399) 1797 posts |
What are we looking at here? |
Michael Grunditz (8594) 245 posts |
RISC OS running on the Unicorn cpu emulation. No other hardware emulation. I only have drivers to communicate with RISC OS, right now only my little UART hack. A fun adventure will be hardware interrupts. I can probably map up host GIC and get info |
Michael Grunditz (8594) 245 posts |
Much better.. managed to get vectors to be honored in emulation (HACK !) ARM BBC BASIC V © Acorn 1989 Starting with 263139580 bytes free. * |
Michael Grunditz (8594) 245 posts |
Basic works , turned out that I needed to run it with “Own errors” disabled.
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Michael Grunditz (8594) 245 posts |
More exception fun: I have managed to inject a simulated hardware interrupt. In this little experiment I simulate the timer 0 interrupt. It works , the centiclock ticks just fine , when I trigger it with a keypress. However after time ticking I get this error:
Maybe someone can tell me what might cause this? |
Rick Murray (539) 13747 posts |
Where is it picking up a non word aligned address from? Some sort of calculated offset gone awry? |
Jon Abbott (1421) 2640 posts |
That looks suspiciously like a PSR, so possibly stack related…one too many or too few registers being pulled from the stack somewhere? |
Paolo Fabio Zaino (28) 1821 posts |
+1 |
Rick Murray (539) 13747 posts |
&90000113 = N, V, Abort mask, SVC32 |
Michael Grunditz (8594) 245 posts |
Thanks for your suggestion.. |
Michael Grunditz (8594) 245 posts |
RISC OS 511MB Cortex-A15 Processor No keyboard present – autobooting *time Fri,02 Jan 1970.00:00:03 Fri,02 Jan 1970.00:00:09 |