Ticket #528 (Fixed)Thu Oct 14 16:42:21 UTC 2021
cc 5.86: Generates LDMDB that traps as undefined instruction on ARMv7
| Reported by: | Stuart Swales (8827) | Severity: | Normal |
| Part: | RISC OS: C/C++ toolchain | Release: | |
| Milestone: | Status | Fixed |
Details by Stuart Swales (8827):
Please see https://www.riscosopen.org/forum/forums/4/topic…
The generated instruction in question is:
LDMDB R2!,{R1,R2}
This disassembles without warning in DecAOF, but *MemoryI does show the warning ‘Rn in list’
This was generated by Norcroft v5.86 when loading a series of uint64_t’s onto the stack as args for a printf().
The ARMv7-A/R ARM C.d states “Instructions with the base register in the list and ! specified are only available in the ARM instruction set before ARMv7, and ARM deprecates the use of such instructions. The value of the base register after such an instruction is UNKNOWN.”
I guess the compiler should avoid generating these when moving 64-bit quantities around.
Changelog:
Modified by Sprow (202) Tue, February 22 2022 - 17:43:53 GMT
- Status changed from Open to Fixed
Taking the example from the forum post, shows no writeback now (no doubt the formatting will get messed up!)
- Identification (file ADFS::Solid.$.o.link)
Norcroft RISC OS Arm C vsn 5.89 [18 Feb 2022]
- Area C$$code, Alignment 4, Size 224 (0×00e0), 6 relocations
Attributes: Code{32bit,FPIS3}: Read only
0×000000: 6d6d7573 summ : STCLVS p5,c7,[sp,#-0×1cc]!
0×000004: 00797261 ary. : RSBSEQ r7,r9,r1,ROR #4
0×000008: ff000008 …. : DCI 0xff000008 ; Undefined instruction
0×00000c: e1a0c00d …. : MOV r12,sp
0×000010: e92dd811 ..-. : PUSH {r0,r4,r11,r12,lr,pc}
0×000014: e24cb004 ..L. : SUB r11,r12,#4
0×000018: e15d000a ..]. : CMP sp,r10
0×00001c: 4bfffff7 …K : BLMI __rt_stkovf_split_small
0×000020: e1a04000 ... : MOV r4,r0 0x000024: e59f0050 P... : LDR r0,0x7c 0x000028: e8900006 .... : LDM r0,{r1,r2} 0x00002c: e92d0006 ..-. : PUSH {r1,r2} 0x000030: e2403008 .0. : SUB r3,r0,#8
0×000034: e8930003 …. : LDM r3,{r0,r1}
0×000038: e92d0003 ..-. : PUSH {r0,r1}
0×00003c: e59f203c < .. : LDR r2,0×80
0×000040: e5920004 …. : LDR r0,[r2,#4]
0×000044: e5923000 .0.. : LDR r3,[r2]
0×000048: e9120006 …. : LDMDB r2,{r1,r2}
0×00004c: e52d0004 ..-. : PUSH {r0}
0×000050: e52d3004 .0-. : PUSH {r3}
0×000054: e28f0f0a …. : ADD r0,pc,#0xa,#30
0×000058: e28dd004 …. : ADD sp,sp,#4
0×00005c: ebffffe7 …. : BL _printf
0×000060: e59f0050 P… : LDR r0,0xb8
0×000064: e1a01004 …. : MOV r1,r4
0×000068: e280001c …. : ADD r0,r0,#0×1c
0×00006c: e9b0000c …. : LDMIB r0!,{r2,r3}
0×000070: e28f0f11 …. : ADD r0,pc,#0×11,#30
0×000074: e91b6810 .h.. : LDMDB r11,{r4,r11,sp,lr}
0×000078: eaffffe0 …. : B _printf
