Entry | |
---|---|
R0 | Flags |
R1 | Low address, word aligned (if bit 0 of R0 set) |
R2 | High address, word aligned inclusive (if bit 0 of R0 set) |
Exit | |
---|---|
R0 | Preserved |
R1 | Preserved |
R2 | Preserved |
The purpose of this call is to ensure that the code cache is up to date with memory.
This SWI is used to ensure that the code cache is up to date with memory – this may not be the case with self-modifying code.
Only use this where absolutely necessary.
R1 & R2 on entry are only used if bit 0 of R0 is set.
Available for earlier versions of RISC OS by the CallASWI module.