|0 = Set start address of current video display|
|1 = Set start address of total video buffer|
|2 = Set end address (exclusive) of total video buffer|
|3 = Set start address of VDU buffer (i.e. as set by OS_Byte 112)|
|All other values reserved|
|R1||Physical address for given DAG|
|R4||Bits 0-23: 6 (reason code)|
|Bits 24-31: Driver number|
|-||All other registers preserved|
The kernel issues this call when it requires the driver to update the DAG (“DMA address generator”) registers of the display hardware. The appropriate driver should respond by performing the requested action and setting R4 to 0 to claim the call.
The OS has a video buffer which is >= total display size, and may be using bank switching (several display buffers) or hardware scroll within the total video buffer.
Video drivers should respond differently depending on whether hardware scroll is supported or not. (The OS will already know this from GraphicsV 8).
Only DAG=0 is significant, and the end address of the current display is implied by the size of the current mode. Calls with DAG=1,2 should be ignored.
DAG=0 again defines display start. DAG=2 defines the last address (exclusive) that should be displayed before wrapping back (if reached within display size), and DAG=1 defines the address to which accesses should wrap back.
Prior to RISC OS 5.19, the kernel had a bug where the DAG addresses sent to the vector would be incorrect if an external framestore was in use. Instead of the addresses pointing to the external framestore, they pointed to the internal framestore that the kernel would be using if the external framestore wasn’t in use. This internal framestore has the same physical base address of the first page of RAM/VRAM in the system; its address can be read by asking OS_Memory 0 to look up the physical address of page number 0.