h6. [[DMAManager]] h6(. » [[DMAManager SWI Calls|SWI Calls]] h6((. » DMA_QueueTransfer h2. DMA_QueueTransfer h5. (SWI &46142) |_<^{width:4em}. Entry | | |/5^. R0 |<^. Flags: | |<^. Bit 0: 1=write transfer (memory to device), 0=read transfer (device to memory) | |<^. Bit 1: 1=scatter list is a circular buffer, 0=not circular | |<^. Bit 2: 1=call [[DMA sync callback|DMASync control routine]], 0=don't call | |<^. Bits 3-31: Reserved (set to 0) | |<^. R1 |<^. Channel handle | |<^. R2 |<^. Value of R11 to be passed to control routines | |<^. R3 |<^. Pointer to word aligned [[DMA Scatter List|scatter list]] | |<^. R4 |<^. Number of bytes to transfer, or 0 for infinite length transfer (if bit 1 of R0 set) | |<^. R5 |<^. Size of circular buffer (if bit 1 of R0 set) | |<^. R6 |<^. Number of bytes between calls to DMASync control routine (if bit 2 of R0 set) | |_<^{width:4em}. Exit | | |<^. R0 |<^. DMA tag | |<^. - |<^. Other registers preserved | h4. Use Queues a DMA transfer request for a logical channel. The returned DMA tag can be used with other DMAManager SWIs such as [[DMA_ExamineTransfer]] and [[DMA_TerminateTransfer]] in order to examine or control the state of the transfer. h4. Notes This documentation only covers the RISC OS 5 version of the DMAManager SWIs. For other OS versions, consult the appropriate PRM volume (e.g. volume 5a).