// Logic for ADFS podule to return IOMD like status

" IOCR,read/write %0i110111
"	i=Nindex from FDD

" IRQSTA,read only %00000i00 (raw)
"	i=Nindex from FDD
" IRQRQA,read only
"	i=1=IRQSTA[2] & IRQMSKA[2]
" IRQMSKA,read/write
"	i=1=enable index interrupt from FDC
" IRQCLRA,write only
"	i=1=clear the index interrupt from the FDC

" IRQSTB,read only %000f0sh0 (raw)
"	f=1=floppy controller interrupt is pending
"	s=1=serial interrupt is pending
"	h=1=ide interface interrupt is pending
" IRQRQB,read only %000f0sh0
"	f=1=IRQSTB[4] & IRQMSKB[4]
"       s=1=IRQSTB[2] & IRQMSKB[2]
"	h=1=IRQSTB[1] & IRQMSKB[1]
" IRQMSKB,read/write %000f0sh0
"	f=1=enabled floppy controller interrupts
"	s=1=enable serial interrupts
"	h=1=enabled ide interface interrupts

" FIQST,read only %10xsxx0d (raw)
"	s=1=serial interrupt is pending
"	d=1=floppy disk psuedo DMA is pending
" FIQRQ,read only %10xsxx0f
"       s=1=FIQST[4] & FIQMSK[4]
"	d=1=FIQST[0] & FIQMSK[0]
" FIQMSK,read/write
"	s=1=enable serial interrupts
"	d=1=enable floppy psuedo DMA

" PDMA,read/write
"	causes pseudo DMA access to FDC
" PDMATC,read/write
"	causes pseudo DMA plus terminal count to FDC

" The podule is subdivided into 8 areas:
"	+&000000 = Simple podule ID for 'Test hardware'
"	+&200000 = IOCR
"	+&400000 = IRQA (+0 ST,+4 RQ/CLR,+8 MSK) 
"	+&600000 = IRQB (+0 ST,+4 RQ,+8 MSK) 
"	+&800000 = FIQ (+0 ST,+4 RQ,+8 MSK) 
"	+&A00000 = PDMA
"	+&C00000 = PDMA+TC
"	+&E00000 = COMBI CHIP