Type 3 lists have a more rigid structure than the other list types. Each list specifies the full set of standard mode timing data, in a hardware-agnostic manner.
Word index | Value |
---|---|
0 | 3 (list format) |
1 | Log2BPP mode variable |
2 | Horizontal sync width (pixels) |
3 | Horizontal back porch (pixels) |
4 | Horizontal left border (pixels) |
5 | Horizontal display size (pixels) |
6 | Horizontal right border (pixels) |
7 | Horizontal front porch (pixels) |
8 | Vertical sync width (rasters) |
9 | Vertical back porch (rasters) |
10 | Vertical top border (rasters) |
11 | Vertical display size (rasters) |
12 | Vertical bottom border (rasters) |
13 | Vertical front porch (rasters) |
14 | Pixel rate (kHz) |
15 | Sync/polarity flags: |
Bit 0: Invert H sync | |
Bit 1: Invert V sync | |
Bit 2: Interlace flag (bit 3) specified, else kernel decides interlacing1 | |
Bit 3: Interlace sync1 | |
16+ | Optional list of VIDC control list items (2 words each) |
N | -1 (terminator) |
When setting the mode, the kernel adjusts the vertical timing parameters by the value specified by the *TV command. *TV is also used to determine the default setting of bit 3 of the sync/polarity flags.
When processing the control list, be aware that -1 is a valid item value. Therefore, you should only terminate your processing if the first word in a pair is -1. Also, to cope with the unlikely event of the VIDC list ending on a page boundary, you should only examine the second word of the pair once you have checked that the first word is valid.
1 Interlace
The sync/pol interlace flag is used to control generation of an interlace sync signal. However, it should not affect the video DMA – meaning that (for a static image) the even field and the odd field will be displaying the same pixel data.
The interlace VIDC control list item will result in the generation of an interlace sync signal, and will adjust the DMA so that the fields alternate between displaying the even and odd rows of the framebuffer. This results in a “full resolution” interlace mode where the even field displays the even rows of the framebuffer, and the odd field displays the odd rows. But because the vertical timing parameters are in units of rasters, this means that the height of the framebuffer will be twice the vertical display size value given in the VIDC list.