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Kernel todo list

This page is intended to list a whole bunch of things which could/should be done, or will be done, to the RISC OS 5 kernel. Some items will make things better from the user’s perspective, while others are just to help OS developers. At the moment this is just one big list, but it might make sense to try and classify the tasks in future (e.g. bug fix, enhancement, etc.)

  • (ARMv7) Need to investigate how to make use of the dual page table pointers to improve task switching; see here for more info.
  • (ARMv6+) Write an abort handler to emulate ARMv5 rotated load behaviour. This will hopefully fix the majority of ARMv6/v7 compatibility issues. See here for more info, or here for current status.
  • (ARMv7) Redo the cache/TLB ops to take advantage of the PIPT/IVIPT cache line tagging used in ARMv7 – see here. To do it properly, we may need to keep a ‘dirty pages’ map which tracks whether any page was ever mapped in with caching enabled – so that should it ever be mapped in uncached, we know to flush the cache first. Needless to say, whoever takes on this task needs to make sure they’re absolutely sure of how everything works!
  • (ARMv6+?) Adding support for the nonexecutable bit to the page table-related APIs would be a good idea, even if we can’t automatically mark an AIF programs data areas as nonexecutable due to fears of self-modifying code
  • (Bugfix) Heap corruption can cause CheckForNullAllocn to get stuck in an infinite loop. It would be nice if the code could detect the infinite loop, even if the heap corruption means there’s little chance of the OS recovering (or even being able to report the occurence to the user)
  • (Enhancement) We need a way to allow HAL_CounterDelay to use WFI, or we need to introduce a proper high resolution timer which programs can use instead of calling the HAL directly (especially since there’s currently no control over allocation of HAL resources to programs)
  • (Enhancement) Improve the data abort (and abort on instruction fetch) error message to make use of the DFSR to provide a more descriptive error. E.g. reporting that something is an alignment fault instead of an ordinary abort.
  • (Enhancement) Allow the HAL to specify the highest interrupt/device number. The kernel will then allocate the appropriate amount of memory at runtime for holding the device claim list. The OMAP4 IRQ controller manages 160 interrupt sources, which is too many to fit in the current fixed-size memory block which the kernel uses.
  • (Bugfix, ARMv7) Work out what’s allowing code to run from pages which aren’t mapped in properly (see here)
  • (Enhancement) New OS_Heap reason code to allocate from the high end of the heap, to avoid fragmentation caused by temporary allocs?
  • (Bugfix) The VDU PreGrow handler temporarily leaves some pointers pointing to bad memory, resulting in infinite abort loops if something tries VDU output while screen memory is being resized/moved
Revised on April 29, 2012 11:20:17 by Sprow (202)? (91.85.62.98)
Edit | Back in time (5 revisions) | See changes | History | Views: Print | Source | Linked from: Cortex-A8 port status, RISC OS Roadmap

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