Deprecated registers
Richard Coleman (3190) 54 posts |
I’m trying to get back into doing some coding and have been trying to get up to speed with the assembler changes since the Archimedes days and I came across the changes to the stack backtrace structures with r13 and r15 being deprecated in LDM and STM, and there has been quite some discussion going on over the past few years around this on the forums but I haven’t found anywhere that says these are the instructions we are now to be using. So, would someone mind checking my code to make sure I’ve got this correct, please? Previously we would do: and then use: So with the restrictions on sp and pc, am I correct in that we should now be doing: and to return: Or is there some other neat way of doing it? I’ve also noticed in the ARM documents that this way of doing backtraces is no longer required, so I assume this is something else we may need to start doing differently. Thanks. |
Jeffrey Lee (213) 6046 posts |
Probably because we’ve mostly decided to ignore the deprecations :-) The October 2010 release of Revision B of the ARMv7 ARM says: The deprecations for LDM are:
The deprecations for STM are:
This is ignoring the obviously silly things like an STM with the base register in the list + writeback (which I think have been deprecated/unpredictable for much longer) The “Deprecated and Obsolete Features” chapter also has a long list of situations under which use of SP is deprecated (e.g. “Most ARM instructions, unlike Thumb instructions, provide exactly the same access to the SP as to R0-R12. This means that it is possible to use the SP as a general-purpose register. However, the use of the SP in an ARM instruction, in any way that is not possible in the corresponding Thumb instruction, is deprecated.”) The July 2011 release of Revision B of the ARMv7 ARM says pretty much the same thing under the entries for LDM/STM, but the Deprecated and Obsolete Features has changed dramatically, revoking many of the deprecations from the previous release of the manual (“Earlier issues of this manual deprecated the use of SP in an ARM instruction, in any way that is deprecated, not permitted, or not possible in the corresponding Thumb instruction. However, user feedback indicates a number of cases where these instructions are useful. Therefore, ARM no longer deprecates these instruction uses.”). Revision C of the ARMv7 ARM looks about the same as revision B. The ARMv8 ARM lists the following deprecations for LDM:
And for STM:
I.e. no mention of SP use being deprecated. Which is probably correct, judging by the way they back-tracked on their deprecation of SP use.
If you ignore the SP deprecation, then the function return code doesn’t need changing. Your function entry code will work, but won’t create a valid stack backtrace structure – the APCS spec says that the stored PC value should point twelve bytes beyond the start of the sequence of instructions that create the backtrace structure (where I guess the “MOV ip, sp” constitutes the start of the sequence). Also, STR of PC is deprecated. The following should be APCS compliant and avoid deprecated instructions: MOV ip, sp SUB sp, sp, #4 STMFD sp!, {..., fp, ip, lr} SUB lr, pc, #8 ; Use LR as temp to avoid leaving FP in an invalid state STR lr, [ip, #-4] SUB fp, ip, #4 But there’s a good chance it will confuse any debuggers because they’ll expect to see a sequence of STM/SFM instructions to appear directly after the “MOV ip, sp”. (Probably solvable by having the stored PC value point to a fake entry point containing an old-style APCS entry sequence, and a branch to jump to the correct part of the real entry point just in case)
Correct. Modern APCS variants are very different to the variant we’re currently using. |
Richard Coleman (3190) 54 posts |
Trying to sort these things out has been like wading through treacle at times, I can see why it’s easier to ignore them. |